TY - JOUR
T1 - Automated detection of micro void in solder bump
AU - Teramoto, Atsushi
AU - Murakoshi, Takayuki
AU - Tsuzaka, Masatoshi
AU - Fujita, Hiroshi
PY - 2006
Y1 - 2006
N2 - In the flip chip junction, void in the solder bump has serious influences on reliability and electric characteristic. In this paper, we propose an automated detection technique of micro voids in solder bump. The void makes hollow on the bump shape in X-ray image. We developed subtraction-based method by means of combination of morphology filter and image subtraction to detect the voids. Furthermore, we introduced noise elimination method using some void feature values and discriminant analysis. We evaluated this technique using simulation model and real bump. As a result, a correct rate reached 99.2%, which demonstrates this technique has very high detection ability.
AB - In the flip chip junction, void in the solder bump has serious influences on reliability and electric characteristic. In this paper, we propose an automated detection technique of micro voids in solder bump. The void makes hollow on the bump shape in X-ray image. We developed subtraction-based method by means of combination of morphology filter and image subtraction to detect the voids. Furthermore, we introduced noise elimination method using some void feature values and discriminant analysis. We evaluated this technique using simulation model and real bump. As a result, a correct rate reached 99.2%, which demonstrates this technique has very high detection ability.
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U2 - 10.1541/ieejias.126.1514
DO - 10.1541/ieejias.126.1514
M3 - Article
AN - SCOPUS:33750898116
SN - 0913-6339
VL - 126
SP - 1514-1521+13
JO - IEEJ Transactions on Industry Applications
JF - IEEJ Transactions on Industry Applications
IS - 11
ER -