Automated detection of micro void in solder bump

Atsushi Teramoto, Takayuki Murakoshi, Masatoshi Tsuzaka, Hiroshi Fujita

研究成果: ジャーナルへの寄稿学術論文査読

4 被引用数 (Scopus)

抄録

In the flip chip junction, void in the solder bump has serious influences on reliability and electric characteristic. In this paper, we propose an automated detection technique of micro voids in solder bump. The void makes hollow on the bump shape in X-ray image. We developed subtraction-based method by means of combination of morphology filter and image subtraction to detect the voids. Furthermore, we introduced noise elimination method using some void feature values and discriminant analysis. We evaluated this technique using simulation model and real bump. As a result, a correct rate reached 99.2%, which demonstrates this technique has very high detection ability.

本文言語英語
ページ(範囲)1514-1521+13
ジャーナルIEEJ Transactions on Industry Applications
126
11
DOI
出版ステータス出版済み - 2006
外部発表はい

All Science Journal Classification (ASJC) codes

  • 産業および生産工学
  • 電子工学および電気工学

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